RISC OS 5 pictured running on ARM Cortex-A8 kit Published: 25th Apr 2009, 15:03:35 | Permalink | PrintablePicture exclusive - This grainy photograph shows a port of RISC OS 5, sourced from the RISC OS Open project, running on a Beagleboard - a device powered by a 600MHz ARM Cortex-A8 processor with a built-in graphics chip. The port, developed by Jeffrey Lee with help from Uwe Kall and ROOL staff, is seen as a major breakthrough for the shared-source project as it proves the OS can be ported to new hardware without the need for a large team of engineers.  Click for a larger image
The picture, taken on Jeffrey's webcam, shows a Beagleboard and RISC OS 5 booting from a ROM image built with ROOL's sources with 256M of RAM and reaching the command-line prompt. The core of the operating system is able to drive a monitor via a DVI connector and can communicate with the outside world via a serial port. Jeffrey said his next step is to work on bringing in USB support so that a keyboard and mouse can be attached to make the device a useful desktop machine.
The low-power Beagleboard, which sells for about 100 quid, uses an ARM-compatible processor from the Texas Instruments OMAP350 range. It features a built-in OpenGL-compliant graphics processor to speed up 2D and 3D drawing to the screen, a maths unit mainly for processing streams of data, memory card slots, audio in and out, USB and other interfaces.
The port also means ROOL's RISC OS 5 is capable of running on the ARM Cortex family of processors, which are set to be used in a much-awaited range of trendy handheld netbooks.
Jeffrey told Drobe: "Video output is certainly working on real hardware.
"Regarding the status of the port, the kernel and critical HAL components (such as the interrupts, timers and serial IO) are the only real things that are working apart from the video code.
"Now that video is working the next goal is likely to be writing the USB drivers, since they should allow for a ROM image to be built that contains all the key features of a computer - the RISC OS desktop, keyboard and mouse support, and access to storage devices. This should hopefully make it a lot easier to test and develop the remaining features than just using the serial console and VDU output.
"Once all the hardware drivers are working there'll still be plenty of work to do to improve their functionality, and to update the kernel and other software to make use of the new CPU features - the most notable features are likely to be the VFPU and an API to allow use of the spare hardware YUV overlay."
* RISC OS Open demonstrated for the first time an A7000 running 32bit RISC OS Shared 5 at the Wakefield 2009 show to prove that its drivers for the Acorn IOMD chipset do work, paving the way for a freely-available RISC OS 5 ROM for RiscPCs.
RISC OS Open was born after RISC OS 5 developers Castle decided to share the source code to its operating system with the world to encourage third-party programmers to contribute to the OS and allow free copies of the OS to be built for end-users to download, test and install. RISC OS 5, as a desktop OS, has been exclusive to the Castle Iyonix range of computers - until now. The Iyonix employed Intel's ARM-compatible 600MHz IOP321 processor.
Links
RISC OS Open website
The port's development discussion thread
The Beagleboard hardware
The ARM-compatible OMAP processor from TI
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