As part of Monday's press conference with Castle, COO Peter Wild gave a brief introduction to Castle's future plans for RISC OS 5, which partly explain why Castle are so eager to press ahead with issues like the RISCOS Ltd. dispute - Castle say they want to push the market forward but want everything "in order" before they do so.Also, copies of the Tematic presentation, that was given at last month's RISCOS Ltd. shareholder meeting, were passed onto RISC OS media outlets to report on. As you may know, Tematic is the design arm of Castle, and has been since the two companies merged at the start of the year, although Tematic were behind the design of the Castle Iyonix.
The game plan
We know they've been saying this for years, but Castle really want to get as big a slice as possible from the huge worldwide market of ARM processors. In 2001, over 400 million ARM based processors were shipped worldwide, so if Castle can push RISC OS onto even a tiny percentage of this number, the stage will be set for bigger things. Or at least, that's been the dream.
Not every ARM processor will be suitable, as every chip considered will need to meet certain requirements for RISC OS (notably the presence of some kind of MMU amongst other things), but their sights are definitely set on modern, 32bit ARM 9, 10 and 11 processor cores. Nevertheless, and (again) we know they've been saying this for years, Castle want to really move into the embedded arena, and hopefully take on some 'virginal' markets. Think PDAs, Internet appliances, in car entertainment systems and other embedded devices that Acorn hinted at too. The concept of people using RISC OS without knowing, in their ethernet enabled fridges or organising their lives with a RISC OS powered PDA, does tickle us.
In terms of recent efforts to develop the embedded side of RISC OS 5, according to the Tematic presentation, Castle have worked on enhancing their C/C++ compiler package, implementing USB 2.0 and IPv6, and working on new video codec support (including WMP), new HALs for ARM 9 devices and also device drivers - Castle claim to have ported the RISC OS 5 kernel to a new processor and system-on-a-chip device in two weeks. In the future, Castle want to focus on even more ARM processor cores, with "emphasis on low power portable and hand held devices" and wireless support.
Right place at the right time
In order to squeeze their way into whatever market space they'll eventually target (or have found, but aren't telling us), Castle realise that RISC OS needs to be 'modernised', and that this will come at a price. So their plan is to approach things gradually and build the OS up to the point where they say they can afford to give RISC OS features that its competitors have. Peter Wild said he'd eventually like to see PMT (that old chestnut) and real time processing in the OS, which was an unexpected comment given (what we imagine to be) the sheer amount of work required to plough these features, sorry, OS architectures into RISC OS 5.
Castle also want to use the same RISC OS kernel in both their embedded systems and in desktop products, like the XScale powered Iyonix. You would be forgiven in thinking that it may be a good idea to have a particular kernel tuned for low foot print, reliable embedded products, and another kernel tuned for feature rich desktop users - but it's Castle's party and they'll build their OS the way they want to. Castle's justification is that, by focussing development on honing an embedded kernel, desktop users will benefit from using a reliable kernel that's undergone the necessary software quality assurance (SQA) tests required for an embedded kernel.
Castle CEO Jack Lillingston was keen to stress that they're not leaving the desktop market behind because they need it to provide a development platform for their clients' engineers, and they also need a desktop market to kindle future generations of programmers. Peter Wild also added that the embedded and desktop markets need not be mutually exclusive.
For instance, Castle launched in May the Merlin project, which will release in phases new features for RISC OS 5. Castle hope to review the feedback they've received from that, allocate resources to features that can be implemented and then inform users of the features they'll be adding. The Tematic presentation also mentions the "possible incorporation" of some RISC OS Select features: merging the RISC OS 4 and 5 kernels is out of the question (leaving Castle to play catch up with the kernel bugs that RISCOS Ltd. have spent the past 4 years fixing), but suggests that RISC OS Select desktop features could work with the RISC OS 5 kernel if RISCOS Ltd. co-operate - which beautifully echoes what RISCOS Ltd. has been asking for the past four months, except RISCOS Ltd. want co-operation with Castle.
Arguing that they are "committed to supporting loyal users and giving them what they deserve" with "plans to support legacy users" despite claiming that 32bit RISC OS 5 is "the only way forward", the highly detailed Castle road map (sans time scales) looks like this: