VIDC20 Data Sheet
1.1.30 Sound Control Register: Address B1H
1tis is a 4 bit register which defines various control bits for the sound system.
31 39 29 26 27 26 2624 23 22 21 29 19 16 17 18 15 14 13 12 11 10 9 8 7 6 6 4 3 2 1 9 ll 0 1 1 IO 0 0 1 1
I L dNSe ~du
sdac
sdr
3it 3: sclr
This bit should NEVER be programmed high.
3it 2: sdac
When high, VIDC10 compatible sound is produced and the sound DACs are enabled. Two digital signals are also output from the chip in this mode. The first, WS/LnR, denotes whether the sound is for the left or right stereo channel (left = high). The other, SDO/MUTE, goes high between samples, when the sound DACs are being muted to allow for settling. These two signals are intended to ease the connection of external audio processing systems, but for basic operation can be ignored.
3it 1: serial sound
This bit is used to select serial sound mode.
3it 0: clksel
This bit is used to select which clock is used in the sound system. When high, the 24M reference dock is used (usually for VIDC10 sound only), when low the optional sound dock is used.