Hi-Res Support
9.0 Hi-Res Support
VIDC20 is able to support colour screens with a resolution up to 1024 by 768 pixels. For higher resolutions, externally serialising the data is required to produce monochrome (or grey-level) pictures. In this scheme one 15ns-pixel could theoretically be serialised to make eight 2,s-pixels i.e. about SOOMHz.
9.1 VIDC20 Support for Hi-Res Mode
When the hrm bit in the Ext register is set, and ESELl[1:0] are set to value 10, VIDC20 outputs 8 bits of data for every normal pixel on the ED[7:0) port. These bits can then be serialised to to= a high frequency monochrome pixel stream; alternatively they can be serialised to 2 or 4 bits, which could then drive a highspeed monochrome DAC for grey level displays. With VIDC20 running at a fundamental clock frequency of about 100MHz, the external serial clock could be running at up to several hundred MHz. In order for the external circuit to be able to synchronise to the VIDC20 output data, ViDC20 also outputs a pixel clock synchronous to the data stream when the htm bit is set.
In this mode, with ESELI[1:0] set to value 10, the video data is driven from the Blue LUT, which outputs data BPD[7:0]. Depending on how the external serialiser circuit is arranged, the LUT must be set up to give a one-one correlation between the logical address and the physical data value. So, for example, if 4 bits are externally serialised into a single bit stream, then 4 bits/pixel mode should be selected, and ED[6,4,2,0] should be used. The lower 16 words of the Blue LU'F should be programmed to give all 16 combinations of BPD[6,4,2,0]. If 8 bits are externally serialised to give a single bit-stream, then 8 bits/ pixel mode should be selected, and a8 256 values of the Blue LUT should be programmed as a one-one mapping.
Hardware cursor support is provided as follows. The cursor palette is not used, though the Blue border may be programmed. Eight bits oŁ cursor data (CD[7:0]) are defined for each normal pixel. The 8 bits are divided into 4 pairs, with the lsb (least significant bit) of each pair defining whether the video data (BPD) or the rush (most significant bit) of the cursor pair is displayed. Each cursor bit-pair operates on 2 bits of the video data (BPD) according to the following tables:
	CD[7] ~ CD[6] ~ ED[7]	I ED[6]
	0 0 BPD[7]	BPD[61
	0	t	0	0
	I	0	BPD[7]	BPD(6)
	I l	1	I	1
Table 4: Deriving high speed 2 bit cursor data from the normal 8 bit output- CD[6&7]