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Note that someone may have already mentioned this on the newsgroups - I haven't scanned all of them so far.

If the patent's only to do with partially banked registers, then it'll be possible to make a 26-bit ARM processor which doesn't do this, but when you enter an interrupt, you copy the unbanked registers from the user mode to the interrupt mode, thus emulating banking in software without actually using partial banks. This veneer would consume a small amount of CPU, but it does mean that we can keep our 26-bit stuff safe, and future proof.

That's if people still want 26-bit mode to be in existance. I personally don't mind if we move over to 32-bit (but I wouldn't want only one machine manufacturer to support it).

 is a RISC OS Usertribbles2 on 19/6/03 3:57PM
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