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In reply to AMS:

I don't think you quite get what we mean when we mention emulation. This is not emulation as in Virtual Acorn where the whole system (processor and other hardware) is emulated. You take RISC OS 5 with its hardware abstraction. Write drivers in native code so that it can access the new hardware. Then you analyse the OS, find which routines are called the most and rewrite them in native code. The rest is caught by emulation of the old processor. As time goes on you continue to convert old code over to the new processor. The performance hit would hopefully be simmilar to that from the Aemulor on the Iyonix (allowing for the increased speed of a G5 processor over an XScale). Well, that's the plan in very general terms. The ins and outs go well beyond the scope of an article comment ;-)

Oh, and Intel doesn't control 90% of the processor market that ARM targets. :-) -- Spriteman.

 is a RISC OS UserSpriteman on 20/9/03 1:42PM
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