I don't feel your comments are entirely fair. I don't think anyone except for a very few people inside RISCOS Ltd know what the internal structure of the RISC OS 4 kernel is at the present time; e.g. how the source code has been adapted to support different hardware platforms.
The RISC OS 4 kernel has been divested of much baggage that arguably doesn't belong in a kernel; e.g. the OS_Convert SWIs. This is something that I applaud. Does it not count as restructuring?
Dynamic areas are only unsuitable for the 32 bit memory map when there are no sensible limits set on the amount of address space claimed. As far as I can tell, this is not the case for RISC OS 4 (most of the new dynamic areas appear to be limited to 16Mb or less, and there aren't an excessive number of them).
It would be fallacious to suggest that the HAL in RISC OS 5 removes the need for device drivers to be written for new hardware, as some people appear to believe. However the limited abstraction it provides is valuable so I hope eventually the OS 4 kernel will present a similar interface for the benefit of those writing driver modules.
Frankly I don't see how RISC OS 4 for Iyonix could work without providing some kind of implementation of the OS_Hardware SWI.