You need to go back and look at the structure of RISC OS, and understand how operating systems work. There are many layers involved, and not all of them are obvious. This is beyond the published APIs, this is about what goes on underneath the covers.
As I understand things: PCITV will talk to the RISC OS 5 PCI module(s) to locate and access the PCITV hardware. Then it's up to the driver as to how the device is controlled. But interrupts and other things are routed from the PCI hardware to the PCITV driver module via the OS 5 kernel and its support modules. It's how these support modules, the OS 5 kernel, and the Iyonix motherboard hardware work together that isn't known to ROL, and (presumably) it's what they need to know in order to get the OS 5 PCI modules to work with their OS 4 kernel and support modules.
As is pointed out time and again, a patchwork quilt of RISC OS 4 modules over a OS 5 base is not going to lend itself towards a quality product. And I think ROL agree. Ideally, they want to run an OS 4 kernel and support modules on the Iyonix hardware, and use OS 5 modules to drive the PCI, ethernet and USB. Then things like PCITV will still talk to the OS 5 PCI modules, and the OS 4 kernel can talk to the OS 5 PCI modules. Everything is happy. Anything else has to be a stop gap to please the 120 people who said they were interested in a port.
The chip on your shoulder about Castle and ROL is blinding your ability to see this technical issue rationally. I can't really understand what you're on about.