Agreed, SRAM based FPGA's do allow for dynamic modification (without even a re-boot). And like you suggest I've seen information about various uses for FPGA application specific acceleration (it is a useful approach IMHO).
My reason for preferring Antifuse over SRAM was for different reasons - yes they are more restrictive, but they once programmed (outside the machine) can't be corrupted (and so should be reliable than SRAM units). I was considering FPGA's as a cheaper alternative for limited runs (where an ASIC would be just too darned expensive) and was not even considering the FPGA as a means of making the machine hardware "reconfigurable".
There is no reason why a computer could not have both types, the antifuse for bits that must be available from power on (and be uncorruptable) and SRAM for non-critical uses where configuration failure or corruption would not crash the machine.
Actually there is always some argument going on somewhere about Single Event Upsets (SEU's) the SRAM proponents (such as Xilinx) say they rarely happen (about once every 170 years (*)- but do bear in mind that's only an ESTIMATE) while Antifuse proponents suggest that their technology is less prone to such events.
(*) As FPGA's haven't be around for that long it has to be a statistical estimate - and as they say there's lies damn lies and statistics.