Simtec has already offered SMP systems for RISC OS with a module and API to allow applications to have multiple threads. The problem is that so much of RISC OS itself and its API assumes a single processor, so any interaction with the OS stalls all of the CPUs. So you get to do a huge source upheaval which is more involved than the 32 bit change, and then get to choose between good performance or compatibility with existing applications.
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