In reply to egel:
"Or the second core (first) just as FPU"
If you mean via a modified FPEmulator I think any theoretical benefits would be non-existant in practice. Farming off individual instructions from one core to another identical core is pointless. Even if you let the first core continue while the second completes a calculation, the amount of useful integer code the first core could complete before it stalls due to a data dependancy is likely to be less than the overheads in getting the two CPUs to talk to each other in the first place. Even if they communicate entirely on-chip.
To benefit properly from a dual core CPU in RISC OS, apps will need to be multi-threaded and processing split between the two cores by some kind of threading system designed specifically for that purpose. If the code contains floating point calculations, both cores will have to either use FPEmulator or a floating point library.